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| (R) SMP100MC TRISILTM FOR TELECOM EQUIPMENT PROTECTION FEATURES Bidirectional crowbar protection Voltage: range from 120V to 270V Low VBO / VR ratio Micro capacitance from 20pF to 30pF @ 50V Low leakage current : IR = 2A max Holding current: IH = 150 mA min Repetitive peak pulse current : IPP = 100 A (10/1000s) MAIN APPLICATIONS Any sensitive equipment requiring protection against lightning strikes and power crossing. These devices are dedicated to central office protection as they comply with the most stressfull standards. Their Micro Capacitance make them suitable for ADSL2+ and low end VDSL. DESCRIPTION The SMP100MC is a series of micro capacitance transient surge arrestors designed for the protection of high debit rate communication equipment. Its micro capacitance avoids any distortion of the signal and is compatible with digital transmission line cards (ADSL, VDSL, ISDN...). Compatible with Cooper Bussmann fuse: TCP 1.25A. BENEFITS Trisils are not subject to ageing and provide a fail safe mode in short circuit for a better protection. They are used to help equipment to meet main standards such as UL60950, IEC950 / CSA C22.2 and UL1459. They have UL94 V0 approved resin. SMB package is JEDEC registered (DO-214AA). Trisils comply with the following standards GR1089 Core, ITU-T-K20/K21, VDE0433, VDE0878, IEC61000-4-5 and FCC part 68. SMB (JEDEC DO-214AA) Table 1: Order Codes Part Number SMP100MC-120 SMP100MC-140 SMP100MC-160 SMP100MC-200 SMP100MC-230 SMP100MC-270 Marking ML12 ML14 ML16 ML20 ML23 ML27 Figure 1: Schematic Diagram December 2004 REV. 1 1/10 SMP100MC Table 2: In compliance with the following standards STANDARD GR-1089 Core First level GR-1089 Core Second level GR-1089 Core Intra-building ITU-T-K20/K21 ITU-T-K20 (IEC61000-4-2) VDE0433 VDE0878 IEC61000-4-5 FCC Part 68, lightning surge type A FCC Part 68, lightning surge type B Peak Surge Voltage (V) 2500 1000 5000 1500 6000 1500 8000 15000 4000 2000 4000 2000 4000 4000 1500 800 1000 Waveform Voltage 2/10 s 10/1000 s 2/10 s 2/10 s 10/700 s 1/60 ns 10/700 s 1.2/50 s 10/700 s 1.2/50 s 10/160 s 10/560 s 9/720 s Required peak current (A) 500 100 500 100 150 37.5 Current waveform 2/10 s 10/1000 s 2/10 s 2/10 s 5/310 s Minimum serial resistor to meet standard () 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESD contact discharge ESD air discharge 100 50 100 50 100 100 200 100 25 5/310 s 1/20 s 5/310 s 8/20 s 10/160 s 10/560 s 5/320 s Table 3: Absolute Ratings (Tamb = 25C) Symbol Parameter 10/1000 s 8/20 s 10/560 s 5/310 s 10/160 s 1/20 s 2/10 s 8/20 s t = 0.2 s t=1s t=2s t = 15 mn t = 16.6 ms t = 20 ms Value 100 400 140 150 200 400 500 5 18 9 7 4 20 21 -55 to 150 150 260 Unit IPP Repetitive peak pulse current A IFS ITSM Fail-safe mode : maximum current (note 1) Non repetitive surge peak on-state current (sinusoidal) kA A I2t Tstg Tj TL I2t value for fusing Storage temperature range Maximum junction temperature Maximum lead temperature for soldering during 10 s. A2s C C Note 1: in fail safe mode, the device acts as a short circuit 2/10 SMP100MC Table 4: Thermal Resistances Symbol Parameter Rth(j-a) Junction to ambient (with recommended footprint) Rth(j-l) Junction to leads Value 100 20 Unit C/W C/W Table 5: Electrical Characteristics (Tamb = 25C) Symbol VRM VBR VBO IRM IPP IBO IH VR IR C Parameter Stand-off voltage Breakdown voltage Breakover voltage Leakage current Peak pulse current Breakover current Holding current Continuous reverse voltage Leakage current at VR Capacitance IRM @ VRM Types max. IR @ VR max. note1 A V A V SMP100MC-120* 108 120 SMP100MC-140* 126 140 SMP100MC-160 144 160 2 5 SMP100MC-200 180 200 SMP100MC-230 207 230 SMP100MC-270 243 270 Note 1: IR measured at VR guarantee VBR min VR Note 2: Note 3: Note 4: Note 5: Note 6: see functional test circuit 1 see test circuit 2 see functional holding current test circuit 3 VR = 50V bias, VRMS=1V, F=1MHz VR = 2V bias, VRMS=1V, F=1MHz Dynamic VBO max. note 2 V 155 180 205 255 295 345 Static VBO @ IBO max. max. note 3 V mA 150 175 200 800 250 285 335 IH C C min. typ. typ. note 4 note 5 note 6 mA pF pF 30 60 30 60 25 50 150 20 45 20 40 20 40 * in development 3/10 SMP100MC Figure 2: Pulse waveform Figure 3: Non repetitive surge peak on-state current versus overload duration ITSM(A) 70 F=50Hz Tj initial = 25C %IPP 100 Repetitive peak pulse current tr = rise time (s) tp = pulse duration time (s) 60 50 40 50 30 20 0 tr tp t 10 0 1.E-02 1.E-01 1.E+00 t(s) 1.E+01 1.E+02 1.E+03 Figure 4: On-state voltage versus on-state current (typical values) IT(A) 100 Tj=25C Figure 5: Relative variation of holding current versus junction temperature IH[Tj] / IH[Tj=25C] 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 VT(V) 10 0 1 2 3 4 5 6 7 8 0.2 0.0 -40 -30 -20 -10 0 10 20 30 Tj(C) 40 50 60 70 80 90 100 110 120 130 Figure 6: Relative variation of breakover voltage versus junction temperature VBO[Tj] / VBO[Tj=25C] 1.08 1.07 1.06 1.05 1.04 1.03 1.02 1.01 1.00 0.99 0.98 0.97 0.96 0.95 0.94 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Figure 7: Relative variation of leakage current versus junction temperature (typical values) IR[Tj] / IR[Tj=25C] 1.E+03 VR=243V 1.E+02 1.E+01 Tj(C) 1.E+00 25 50 Tj(C) 75 100 125 4/10 SMP100MC Figure 8: Variation of thermal impedance junction to ambient versus pulse duration (Printed circuit board FR4, SCu=35m, recommended pad layout) Zth(j-a)/Rth(j-a) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 F =1MHz VOSC = 1VRMS Tj = 25C Figure 9: Relative variation of junction capacitance versus reverse voltage applied (typical values) C [VR] / C [VR=2V] tp(s) 0.1 0.0 1 10 VR(V) 100 1000 APPLICATION NOTE In wireline applications, analog or digital, both central office and subscriber sides have to be protected. This function is assumed by a combined series / parallel protection stage. Ring relay Protection stage Line Line Ex. Analog line card Ex. ADSL line card or terminal In such a stage, parallel function is assumed by one or several Trisil, and is used to protect against short duration surge (lightning). During this kind of surges the Trisil limits the voltage across the device to be protected at its break over value and then fires. The fuse assumes the series function, and is used to protect the module against long duration or very high current mains disturbances (50/60Hz). It acts by safe circuits opening. Lightning surge and mains disturbance surges are defined by standards like GR1089, FCC part 68, ITU-T K20. Fuse TCP 1.25A Tip L Tip S Fuse TCP 1.25A T1 Protection stage SMP100MC-xxx Gnd Gnd SMP100MC-xxx T2 SMP100MC-xxx Fuse TCP 1.25A Ring L Ring S Typical circuit for subscriber side Typical circuit for central office side 5/10 SMP100MC Following figure shows the test method of the board having Fuse and Trisil. I surge Surge Generator Line side Test board V Following curve shows the turn on of the Trisil during lightning surge. Device to be protected Oscilloscope Current probe Voltage probe These topologies, using SMP100MC from ST and TCP1.25A from Cooper Bussmann, have been functionally validated with a Trisil glued on the PCB. Following example was performed with SMP100MC-270 Trisil. For more information, see Application Note AN2064. Following curve shows Trisil action while the fuse remains operational. Test conditions: 2/10s + and -2.5 and 5kV 500A (10 pulses of each polarity), Tamb = 25C Test result: Fuse and Trisil OK after test in accordance with GR1089 requirements In case of high current power cross test, the fuse acts like a switch by opening the circuit. Test conditions: 600V 3A 1.1s (first level), Tamb = 25C Test result: Fuse and Trisil OK after test in accordance with GR1089 requirements Test conditions: 277V 25A (second level), Tamb = 25C Test result: Fuse safety opened and Trisil OK after test in accordance with GR1089 requirements 6/10 SMP100MC Figure 10: Test circuit 1 for Dynamic IBO and VBO parameters 100 V / s, di /dt < 10 A / s, Ipp = 100 A 2 45 66 470 83 0.36 nF 46 H U 10 F KeyTek 'System 2' generator with PN246I module 1 kV / s, di /dt < 10 A / s, Ipp = 10 A 26 H 250 12 47 46 H U 60 F KeyTek 'System 2' generator with PN246I module Figure 11: Test circuit 2 for IBO and VBO parameters K ton = 20ms R1 = 140 R2 = 240 220V 50Hz Vout DUT VBO measurement 1/4 IBO measurement TEST PROCEDURE Pulse test duration (tp = 20ms): for Bidirectional devices = Switch K is closed for Unidirectional devices = Switch K is open VOUT selection: Device with VBO < 200V VOUT = 250 VRMS, R1 = 140 Device with VBO 200V VOUT = 480 VRMS, R2 = 240 7/10 SMP100MC Figure 12: Test circuit 3 for dynamic IH parameter R Surge generator VBAT = - 48 V D.U.T This is a GO-NOGO test which allows to confirm the holding current (IH) level in a functional test circuit. TEST PROCEDURE 1/ Adjust the current level at the IH value by short circuiting the AK of the D.U.T. 2/ Fire the D.U.T. with a surge current IPP = 10A, 10/1000s. 3/ The D.U.T. will come back off-state within 50ms maximum. Figure 13: Order Code SMP Trisil Surface Mount Repetitive Peak Pulse Current 100 = 100A Capacitance MC = Micro Capacitance Voltage 270 = 270V 100 MC - xxx 8/10 SMP100MC Figure 14: SMB Package Mechanical data E1 REF. D E A1 C L A2 b A1 A2 b c E E1 D L DIMENSIONS Millimeters Inches Min. Max. Min. Max. 1.90 2.45 0.075 0.096 0.05 0.20 0.002 0.008 1.95 2.20 0.077 0.087 0.15 0.41 0.006 0.016 5.10 5.60 0.201 0.220 4.05 4.60 0.159 0.181 3.30 3.95 0.130 0.156 0.75 1.60 0.030 0.063 Figure 15: Foot Print Dimensions (in millimeters) 2.3 1.52 2.75 1.52 Table 5: Ordering Information Part Number SMP100MC-120 SMP100MC-140 SMP100MC-160 SMP100MC-200 SMP100MC-230 SMP100MC-270 Marking ML12 ML14 ML16 ML20 ML23 ML27 SMB 0.11 g 2500 Tape & reel Package Weight Base qty Delivery mode Table 6: Revision History Date September-2003 14-Dec-2004 Revision 0B 1 First issue. Absolute ratings values, table 3 on page 2, updated. Description of Changes 9/10 SMP100MC Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of compagnies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 10/10 |
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